Easy Design of the Boostbuck Family of Converters
 
  Background
The Cuk Converter was first introduced to the field of Power Electronics at PowerCon 5, in San Francisco, in May of 1978. It was universally hailed as a great advance, and many engineers working in the industry left the conference with high hopes of designing the topology into their products, and securing the benifits it promised.

A scant two years later, at PowerCon 7 in San Diego, a general revolt against it was led by Rudy Severns. In a largely ad-libbed presentation, he convinced many present that the topology proposed by Drs. Middlerook and Cuk was essentially smoke and mirrors.

That is, he denied the existence of a single "Optimum Topology," arguing that the choice of topology should be left to the engineer, and was application dependent. This approach was much more in line with prevailing engineering thinking in that day, and convinced the attendees that each topology had pros and cons, and, so, each excelled in a particular circumstance. In short, choice of topology was spec dependent.

To bolster his presentation, he distributed a compillation of well over 100 switched-mode topologies. This collection remains, today, probably the most complete available.

The explanation for this shift in philosophy of design is generally ascribed to personal, professional, political, and financial forces. In truth, I believe that the reason is far simpler: In the two intervening years, nearly every engineer in the field made some attempt to design one or another of the Boostbuck topologies, but failed miserably!

The reason for this failure mystified me for many years, as the Caltech group had gone to considerable lengths to make the design problem an easy one for working engineers. Then I realized that most designers had gone through essentially the same sequence of design attempts. Namely, they had set out to build an Integrated Magnetics Cuk Converter; had been unsuccessful at designing the magnetic piece required, and had fallen back on the coupled inductor converter. There again, the design of the coupled inductor had defeated them, and they had settled for the plain Cuk Converter. Even here, their results were poor at best, and what had started out a winning proposition had resulted in discouragement and despair.

Along the way, these engineers had seen themselves as giving up performance as they shifted from integrated to coupled to uncoupled topologies. By the end, they assumed that the resulting breadboard was incapable of outperforming anything, and was thus abandoned.




Simplifying Assumptions
Before proceeding to the solution of this mystery, it wil be necessary to introduce some simplifying assumptions.

As the field grew over the years, many designs were undertaken, and the various flaws of Rudy's 100+ topologies came to light, any number of ingenious techniques were derived in attempts to circumvent them.

One of the most common is current-mode programming, which promises greatly improved dynamics in those converters that suffer from RHP zeros, and easy control of those that do not. The failing of CMP, is that it results in a single pole rolloff, which tends to delay crossover until a point uncomfortably near the switching frequency. But, unlike the Natural Sampling used in voltage feedback schemes, CMP results in frequency dependent terms near fs, i.e. extra phase shift near crossover. Natural Sampling, on the other hand, works right up to, and beyond! fs without introducing any extra phase shift at all.

As a result, good loop response is hard to obtain with CMP, which suffers from leading-edge-spike jitters as well. For these reasons, we will confine our design efforts to standard voltage feedback.

This approach necessitates shunt damping of the input and output filters of our converter, which will be shown to be very easy when done correctly.

Another assumption will be the avoidance of discontinuous mode. The technique of parallelling ech transistor Q with a diode, P, and vice-versa is well known. A novel, and easy way of accomplishing this fix will be given later.

Another assumption will be that only MOSFETs and Schottkey diodes are used for switch elements. BJTs and juction diodes will be avoided as too slow, and otherwise not amenable to switcher design. Further, outmoded IGBT, TRIAC, and similar devices and the circuits they are used in will be abandoned as not properly forming a part of the modern generation of power conversion topologies.

Further, such nonlinear techniques as sliding-mode control, uP control, and feed forward will be eliminated. Such nonlinear techniques prove to be nearly impossible to design with, in spite of their highly touted theoretical advantages.

In short, only Voltage Mode Programmed, Boostbuck family topologies, running in continuous, or "heavy" mode, with linear feedback will remain as truly viable design approaches.

Throughout, Dr. Middlebrook's Canonical Model will be our guide; Dr. Cuk's State Space Averaging will yield our theoretical predictions; common sense will be our guiding light; and yours truly will provide the long missing "keys" to designing this Optimum Topology!



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