 Design Keys |
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Design Keys |
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As mentioned in several places previously, the reason for this site is simple. My belief is that the Power Electronics industry has never embraced the Boostbuck family of converters, in spite of early favorable reviews, and has thus never reaped the benefits it provides. Most engineers in the field tend to attribute this fact to political, personal, and economic factors. Others claim to disbelieve that such a thing as an "optimum topology" can exist. I think that the reason these topologies are not used more often is that a few essential "Design Keys" have never been made available to the design community; and for that reason alone, other, more familiar topologies are chosen. Below, then, are the necessary keys, provided for the betterment of the Power Electronics industry.  These are very simple. They give the switch stress for the Cuk topologies in the most useful form. P&Q Vs = Vg/D' P&Q Is = I/D' Note that the stress on the transistor Q, and the diode P are identical! if the converter is 1:1. If it is isolated and stepped down by N:1, then the transistor's current is divided by N, while the diode's voltage is divided by N. P Vs = Vg/ND' Q Vs = Vg/D' P Is = I/D' Q Is = I/ND' For the Boost-Buck Cascade topology, the voltage stress is the same on all four switch elements. The current stress is as given. P1,Q1 Vs = Vg/D' P2,Q2 Vs = Vg/D' P1,Q1 Is = Ig = DI/D' = MI P2,Q2 Is = I The cascade cannot be isolated. Satisfying Dr. Middlebrook's input & output impedance inequalities is easy, once wo1 and wo2 are properly aligned. The result is a single pair of poles at wo1 = D'/SQRT(L1C1). The low frequency gain is just 1/D'**2. This requires: Q1 = Ro1/r1 = 1/2 Q2 = Ro2/r2 = 1. r1 is the input filter's damping resistor r2 is the output filter's damping resistor From the Canonical Model: Ro1 = D'SQRT(L1/C1) Ro2 = SQRT(L2/C2) Also required for stability are certain relationships between the relative ripples (p-p value divided by steady-state value) on the four reactances L1, C1, L2, C2; as follows. Let the relative p-p ripples (i.e. % p-p ripple divided by 100%) be dI1, dV1, dI2, dV2. We then require: dV1/D' = dI1/M = dI2 = SQRT(8dV2). Meeting these conditions is not hard. Film caps make the best C1 & C2, while ferrite pot or PQ cores work best for L1 & L2. Electrolytics work well for damping. So long as they are 10X or more of the size of the working cap, the exact value doesn't matter. EXAMPLE: Vg=20V, V=5V, D=.2, M=.25, dI1=.1, dV1=.32, dI2=.4, fs=250kHz, C1=1.0uF, L1=64uH, C2=20uF. All requirements stated above are satisfied by this design. It is an on-board regulator using the Cuk Converter. It provides 10 Amps of 5V (TTL) output from a -24V source (telecom.) The input Vg is given as 20 Volts to account for 17% inefficiency in the converter itself. The result is a plant with two poles at 16kHz, and a little less than 4dB of plant (power) gain. With 35dB of feedback, and a lead at abot 100kHz, excellent performance is obtained. Note that crossover is somewhat beyond the Shannon Limit, which is permitted when natural sampling is employed. This fact is shown in one of Dr. Middlebrook's technical papers, and has been used by your humble webmaster in an actual industry design! Most of the inefficiencies in a switching power supply come from two sources. One is the housekeeping and feedback circuitry, which consume a certain amount of current. The other is trickier, and comes from switching losses and I-squared-R losses. The best approach to including the latter is to rewrite the DC gain equation for M = V/Vg, since that is where such losses show up. Thus if one expects 15% power loss in the converter itself, just write M = V/Vg = (0.85)D/D'. V-squared-G losses are usually so small that it is not worthwhile to adjust for them. If one did, it would look like M = Ig/I = (0.95)D/D'. My suspicion has always been that switching losses are a combination of I-squared-R and V-squared-G losses, but I have never had the time to follow up on this hunch! This is perhaps the most difficult quantity of all to calculate! Since the Magnetizing Inductance of the transformer of an isolated Cuk Converter is a reactance just like L1, L2, C1 & C2, it is excited by duty cycle, source, or load perturbations just as they are. Granted, the steady state value of I3 is zero, but overhead must be allowed in designing this magnetic, if saturation is to be avoided during transients. The question is, how much? Some of the flux swing is due to excitation at fs necessary to achieve transformer action. The rest occurs only when a line or load transient changes the voltage on C1 (which is split in the isolated case,) forcing current through the magnetizing inductance (transformer's core.) The mathematics defining the relationship between effective permeability and peak transient current is exceedingly complex. A good place to start with a ferrite is MUeffective = magnetic path length/gap length = 300. In our example, this gives an overhead requirement of 10%. That is, one must reserve 10% of the total available flux B for transient excitation. Whew! Do not be too quick to dismiss P-channel FETs as power devices! Though their performance lags behind that of their N-channel cousins, remember that in most designs, the ful spec performance of the device is rarely realized. Usually, it is circuit and layout constraints that define switching speeds, rather than the max capability of the device itself. In return for higher ON resistance, one gets greatly simplified drive circuitry. In the Buck-Boost Cascade, for instance, a P-channel FET in the Buck Converter is easily switched with a ground referenced drive. Another good place to use them is for eliminating discontinuous mode. You will find that the gates of complementary N/P pairs will never be separated by an fs square-wave, as is the case with an N/N pairing. This feature was demonstrated at PowerCon 5 when a coupled inductor Cuk Converter pair was used to implement a switching amplifier! Use discrete parts as much as possible. ICs are easy and quick, but their reliability rating is low. Just putting a transistor on a chip doesn't make it infinitely reliable. Using two op-amps for every bell and whistle is a fast-track to sub-100,000 hr. reliability. The good old 2N2222/2907 pair sports only about a 6 or 7 failures/10E9 hr. rate.! | The Four Topologies | Other Topologies | Philosophy of Design | Do the Math | Design Keys | FAQs | | Return Home | Old Home | |
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